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Universal Technology releases software update to support the 32-bit microcontroller STM32F303CCT6 fo

author::Microelectronicsrelease date:2023-05-08Viewers:1065

The leader of the chip programmer industry - Acroview Technology has recently released the latest programming software update and a list of newly supported chip models. Among them, ST STM32F303CCT6, a 32-bit microcontroller of STM Semiconductor, has been supported by Acroview's universal programmer platform AP8000.


STM32F303CCT6 is based on high-performance ARM ® Cortex ®- M4 32-bit RISC core, FPU operating frequency is 72 MHz, built-in floating point unit (FPU), memory protection unit (MPU) and embedded tracking macrocell array (ETM). This includes high-speed embedded memory (512KB flash memory, 80KB SRAM), flexible memory controllers (FSMC) for static memory (SRAM, PSRAM, NOR, and NAND), and a large number of enhanced I/O and peripheral devices connected to AHB and two APB buses.

STM32F303CCT6 provides four fast 12 bit ADCs (5Msps), seven comparators, four operational amplifiers, two DAC channels, one low-power RTC, up to five universal 16 bit timers, one universal 32 bit timer, and up to three timers specifically designed for motor control. They also have standard and advanced communication interfaces: up to three I2Cs, up to four SPIs (two SPIs with multiplexed full duplex I2S), three USARTs, up to two UARTs, CAN, and USB. To achieve audio level accuracy, I2S peripheral devices can be timed through external PLL.


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Main features:

• Core Arm ® Cortex ®- M4 32-bit CPU with FPU (up to 72MHz), single cycle multiplication and HW division, 90DMIPS (from CCM), DSP instructions and MPU (memory protection unit), instructions and MPU (memory protection unit)

• Working conditions

VDD, VDDA voltage range: 2.0 V to 3.6 V

• Memory

-128 to 256KB of Flash storage

Up to 40KB of SRAM, HW parity is implemented on the first 16KB, and hardware parity is implemented on the first 16KB.

Routine enhancer, 8KB SRAM on instruction and data bus, 8KB SRAM on instruction and data bus, with HW parity check (CCM)

CRC computing unit

• Reset and supply management

- Power on/power off reset (POR/PDR)

- Programmable Voltage Detector (PVD)

- Low power mode: sleep, stop, and standby modes

- VBAT power supply for RTC and backup registers

• Clock management

-4 to 32kHz crystal oscillator

-32 kHz oscillator for RTC with calibration function

- Internal 8MHz RC with x 16PLL option

- Internal 40kHz oscillator


Up to 87 fast I/Os

- All can be mapped to external interrupt vectors

- All capable of withstanding 5V voltage

• Interconnection matrix

12 channel DMA controller

Four 0.20 µ S ADCs (up to 39 channels) with selectable resolution of 12/10/8/6 bits, 0 to 3.6V conversion range, single ended/differential input, independent single ended/differential input, independent analog power supply of 2 to 3.6V

Two 12 bit DAC channels, analog power supply from 2.4V to 3.6V

Seven fast rail to rail analog comparators with 2 to 3.6V analog power supply

Four operational amplifiers can be used in PGA mode, and all terminals can use 2.4 to 3.6V analog power supply

Up to 24 capacitive sensing channels, supporting touch keys, linear, and rotary touch sensors

Up to 13 timers


- One 32-bit timer and two 16-bit timers with up to 4 IC/OC/PWM or pulse counters and orthogonal (incremental) encoder inputs

- Two 16 bit 6-channel advanced control timers with up to 6 PWM channels, deadlock time generation and emergency stop

- One 16 bit timer with 2 IC/OC, 1 OCN/PWM, dead time generation and emergency stop

- Two 16 bit timers with IC/OC/OCN/PWM, deadlock time generation and emergency stop

- Two watchdog timers (independent windows)

SysTick timer: 24 bit downlink counter

- Two 16 bit basic timers for driving DAC

Calendar RTC with alarm, periodically waking from stop/standby mode

• Communication interface

- CAN interface (valid for 2.0B)

- Two I2C fast mode inputs (1Mbit/s) with 20 mA current perfumer, SMBus/PMBus, wake up from STOP


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系统框图

 

The AP8000 multi-purpose er independently developed by Acroview Technology includes three main parts: the host, the base plate, and the adapter seat.




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The host supports USB and NET connections, allowing multiple programmers to be networked, achieving the goal of controlling multiple IC programmers to burn simultaneously. The built-in chip safety protection circuit ensures that even short circuits caused by chip reversal or other reasons can be immediately detected and powered off to ensure the safety of the chip and programmer. Embedded high-speed FPGA greatly accelerates data transmission and processing. There is an SD card slot on the back of the host. The engineering files produced by PC software are placed in the root directory of the SD card and inserted into the slot. By pressing the buttons on the programmer, you can select, load, and execute commands such as burning the engineering files, achieving the goal of being able to operate without the PC, greatly reducing the cost of PC hardware configuration and facilitating the quick matching of the working environment.


The AP8000 enhances the scalability of the host by adding an adapter board to the motherboard. Currently, it supports all mainstream semiconductor manufacturers' devices, including TI, ST, MicroChip, Atmel, Hynix, Macronix, Micron, Samsung, Toshiba, etc. The supported device types include NAND, NOR, MCU, CPLD, FPGA, EMMC, etc. It supports file formats such as Intel Hex, Motorola S, Binary, POF, etc.



Company Profile


About STMicroelectronics: STMicroelectronics, founded in 1987, was formed by the merger of SGS Microelectronics from Italy and Thomson Semiconductor from France. In May 1998, SGS-THOMSON Microelectronics changed

universal programmer platform and the latest IPS5000 programmer automation solution provide one-stop solutions for customers in the semiconductor and electronic manufacturing fields. The company has served leading global customers such as Huawei, BYD, and Foxconn.

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